1. Field of the Invention
The present invention relates to a multilayer printed circuit board (PCB), and more particularly to a multilayer PCB consisting of two or more layers with a plurality of signal traces or power traces.
2. Description of the Background Art
A typical multilayer PCB has a ground layer which is normally formed vertically beneath a substrate so as to be substantially parallel to a signal trace and/or a power trace on the substrate. In some typical multilayer PCBs, the ground layer has edges which define a gap portion formed for reasons of the design of a print pattern and/or for convenience of mounting. In such a case, the signal trace or the power trace straddles the gap portion in the ground layer. If a current is applied to a load connected to such a multilayer PCB, a return current flowing through the ground layer detours around the gap portion, so that a current loop area is increased, resulting in an increase of unwanted emission.
Conventionally, there is a multilayer PCB (hereinafter, referred to as a “conventional multilayer PCB”) in which a ground trace is formed next to a signal trace or a power trace in order to curb the occurrence of the unwanted emission.
FIGS. 6A and 6B are schematic views showing the structure of the conventional multilayer PCB. For convenience of explanation, X-, Y-, and Z-axes perpendicular to each other are shown in FIGS. 6A and 6B. Specifically, FIG. 6A is a top view showing the structure of the conventional multilayer PCB, and FIG. 6B is a view showing a cross section of the multilayer PCB viewed from the direction of arrow B and taken along plane A shown in FIG. 6A (see one-dot chain line) which is parallel to the ZX-plane.
In FIGS. 6A and 6B, the conventional multilayer PCB includes a substrate 101, a ground layer 102, a signal trace 103, two vias 104a and 104b, and a ground trace 105. For convenience of illustration, the substrate 101 is not shown in FIG. 6A.
The substrate 101 is composed of a dielectric material.
The ground layer 102 is composed of a low impedance material, and formed on the bottom face of the substrate 101. The ground layer 102 is not formed across the entire bottom face of the substrate 101, and is in the shape of, for example, a square “U” when viewed from vertically above. As shown in FIG. 6A, the ground layer 102 has edges which define a gap portion α formed for reasons of the design of a print pattern and/or for convenience of mounting. Specifically, the shape of the gap portion α is defined by inner edges of the ground layer 102 (see FIG. 6A) as a rectangle which ranges from a left end portion of the ground layer 102 to the vicinity of the center in a direction parallel to the X-axis.
The signal trace 103 is composed of a conductive material, and formed on the top face of the substrate 101 in a direction parallel to the Y-axis. Here, if the signal trace 103 is projected vertically down onto the ground layer 102, the projected signal trace 103 crosses the gap portion α. The signal trace 103 is formed on the top face of the substrate 101 which satisfies the above condition. That is, the signal trace 103 is situated so as to straddle the gap portion α.
The vias 104a and 104b are formed in the following manner. Firstly, two through holes each having an axis parallel to the Z-axis are formed in the substrate 101. Here, each through hole is located in the vicinity of an edge of the ground layer 102 at a predetermined distance away from the signal trace 103 in the X-axis direction (in this instance, the negative direction of the X-axis). Cylindrical surfaces of such through holes are coated with a conductive material to complete the vias 104a and 104b. 
The ground trace 105 is composed of a conductive material, and formed on the top face of the substrate 101 in a direction parallel to the Y-axis. The ground trace 105 connects the vias 104a and 104b at their top ends.
If a current is applied to a load (not shown) connected to the above-described signal trace 103 and ground layer 102 (see arrow C in FIG. 6A), as indicated by arrow D in FIG. 6A, a return current flows from the ground layer 102 through the via 104a to the ground trace 105 substantially without detouring around the gap portion α, and returns to the ground layer 102 through the via 104b. Thus, it is possible to reduce the current loop area when compared to the case where the return current detours around the gap portion α. In this manner, the conventional multilayer PCB curbs the occurrence of unwanted emission.
Incidentally, the multilayer PCB is generally costly, and therefore, it is often desired to configure circuitry using a printed circuit board with a smaller number of layers (e.g., a double sided PCB). In the conventional multilayer PCB, however, one or two pieces of ground traces 105 are formed for each piece of signal trace 103. If one piece of signal trace 103 occupies one or two ground traces 105, it is difficult to form a number of signal traces on the multilayer PCB. Because this results in the formation of a large number of ground traces 105 on the multilayer PCB, a large area of the top face of the substrate 101 is occupied by the ground traces 105. Thus, the area that is occupied by various traces on the substrate 101 (i.e., the trace area) is considerably increased, causing a difficulty in configuring required circuitry using a printed circuit board with a smaller number of layers.